High-Performance Charge-Trapping Flash Memory Device With an Ultrathin 2.5-nm Equivalent- $\hbox{Si}_{3}\hbox{N}_{4}$-Thickness Trapping Layer
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials
Link
http://xplorestaging.ieee.org/ielx5/16/6117780/06078413.pdf?arnumber=6078413
Cited by 7 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. The research of data retention of HfO2 as trapping layer: First-principles study;IOP Conference Series: Materials Science and Engineering;2019-10-01
2. ZnO/NiO Diode-Based Charge-Trapping Layer for Flash Memory Featuring Low-Voltage Operation;ACS Applied Materials & Interfaces;2015-03-17
3. First-principles study on the minimization of over-erase phenomenon in Si3N4 trapping layer;Acta Physica Sinica;2015
4. Research of data retention for charge trapping memory by first-principles;Acta Physica Sinica;2015
5. Characterization of oxygen impurity in silicon nitride storage layer: A first-principles investigation;physica status solidi (b);2014-04-06
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