Si-passivated Ge nMOS gate stack with low Dit and dipole-induced superior PBTI reliability using 3D-compatible ALD caps and high-pressure anneal-Reference-Cited by-同舟云学术

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Si-passivated Ge nMOS gate stack with low Dit and dipole-induced superior PBTI reliability using 3D-compatible ALD caps and high-pressure anneal

Published:2016-12 Issue: Volume: Page:
ISSN:
Container-title:2016 IEEE International Electron Devices Meeting (IEDM)
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Author:

Arimura H.,Cott D.,Loo R.,Vanherle W.,Xie Q.,Tang F.,Jiang X.,Franco J.,Sioncke S.,Ragnarsson L.-A.,Chiu E.,Lu X.,Geypen J.,Bender H.,Maes J. W.,Givens M.,Sibaja-Hernandez A.,Wostyn K.,Boccardi G.,Mitard J.,Collaert N.,Mocuta D.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/7824662/7838021/07838534.pdf?arnumber=7838534

Cited by 18 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Impact of work function metal stacks on the performance and reliability of multi-V RMG CMOS technology;Solid-State Electronics;2024-06

2. Low-frequency noise characterization of gate oxide trap depth distribution of MOSFETs;Applied Physics Letters;2023-05-29

3. Low D_it of $(2-4)\times 10^{10}$ using Y₂O₃/epi-Si/Ge Gate Stacks;2023 International VLSI Symposium on Technology, Systems and Applications (VLSI-TSA/VLSI-DAT);2023-04-17

4. From FinFET to Nanosheets and Beyond;Springer Handbook of Semiconductor Devices;2022-11-11

5. Systematic Study on Positive Bias Temperature Instability(PBTI) of ZrO₂-based Ge nMOSFETs with Interlayer Passivations;2022 International Conference on IC Design and Technology (ICICDT);2022-09-21

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