Gate Camouflaging Using Reconfigurable ISFET-Based Threshold Voltage Defined Logic-Reference-Cited by-同舟云学术

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Gate Camouflaging Using Reconfigurable ISFET-Based Threshold Voltage Defined Logic

Published:2023-06-26 Issue: Volume: Page:
ISSN:
Container-title:2023 21st IEEE Interregional NEWCAS Conference (NEWCAS)
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Author:

Moussavi Elmira¹,Singh Animesh¹,Sisejkovic Dominik²,Kumar Aravind Padma¹,Kizatov Daniyar¹,Ingebrandt Sven¹,Leupers Rainer¹,Pachauri Vivek¹,Merchant Farhad³

Affiliation:

1. RWTH Aachen University,Germany

2. Corporate Research Robert Bosch GmbH,Security, Privacy, and Safety Research Group,Germany

3. Newcastle University,UK

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10198027/10198028/10198032.pdf?arnumber=10198032

Reference17 articles.

1. Realization of a PEDOT:PSS/Graphene Oxide On-Chip Pseudo-Reference Electrode for Integrated ISFETs

2. pHGen: A pH-Based Key Generation Mechanism Using ISFETs

3. pH sensing characteristics of silicon on insulator (soi) junctionless (jl) ion-sensitive field-effect transistor;narang;Advanced Science, Engineering and Medicine,2016

4. Design and characterization of cmos readout circuit for isfet and ise based sensors;yusoff;International Journal of Electrical and Computer Engineering,2013

5. A 1 Gb 2 GHz 128 GB/s Bandwidth Embedded DRAM in 22 nm Tri-Gate CMOS Technology

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1. A circuit protection method based on replacing minterms with combinatorial circuits;Microelectronics Journal;2024-09

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