Tunable Non-Volatile Gate-to-Source/Drain Capacitance of FeFET for Capacitive Synapse
Author:
Affiliation:
1. School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA, USA
2. GlobalFoundries Fab1 LLC & Company KG, Dresden, Germany
Funder
PRISM, one of the SRC/DARPA JUMP 2.0 centers
the German Bundesministerium fur Wirtschaft
Intelligence Advanced Research Projects Activity
the State of Saxony in the frame of the Important Project of Common European Interest
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials
Link
http://xplorestaging.ieee.org/ielx7/55/10265125/10237236.pdf?arnumber=10237236
Reference12 articles.
1. Impact of Ferroelectric Wakeup on Reliability of Laminate based Si-doped Hafnium Oxide (HSO) FeFET Memory Cells
2. A 28 nm HKMG super low power embedded NVM technology based on ferroelectric FETs;trentzsch;IEDM Tech Dig,2016
3. BEOL Compatible Superlattice FerroFET-based High Precision Analog Weight Cell with Superior Linearity and Symmetry
4. Incremental Drain-Voltage-Ramping Training Method for Ferroelectric Field-Effect Transistor Synaptic Devices
5. Capacitive Memory Window With Non-Destructive Read in Ferroelectric Capacitors
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