Bypass Resistive RAM With Interface Switching-Based Resistive RAM and InGaZnO Bypass Transistor for V-NAND Applications-Reference-Cited by-同舟云学术

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Bypass Resistive RAM With Interface Switching-Based Resistive RAM and InGaZnO Bypass Transistor for V-NAND Applications

Published:2024-02 Issue:2 Volume:45 Page:192-195
ISSN:0741-3106
Container-title:IEEE Electron Device Letters
language:
Short-container-title:IEEE Electron Device Lett.

Author:

Han Geonhui¹^ORCID,Lee Kyumin¹^ORCID,Kim Dongmin¹^ORCID,Seo Yoori¹^ORCID,Lee Jinwoo²,Choi Jinmyung²,Ahn Dongho²,Oh Sechung²,Hwang Hyunsang¹^ORCID

Affiliation:

1. Department of Materials Science and Engineering, Center for Single Atom-Based Semiconductor Device, Pohang University of Science and Technology (POSTECH), Pohang-si, South Korea

2. Semiconductor Research and Development Center, Samsung Electronics, Hwaseong-si, Republic of Korea

Funder

Samsung Electronics Company Ltd.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx7/55/10415514/10347256.pdf?arnumber=10347256

Reference23 articles.

1. Review of Semiconductor Flash Memory Devices for Material and Process Issues

2. Charge-trapping device structure of SiO2∕SiN∕high-k dielectric Al2O3 for high-density flash memory

3. Performance Improvement in Charge-Trap Flash Memory Using Lanthanum-Based High- $\kappa$ Blocking Oxide

4. Vertical cell array using TCAT(terabit cell array transistor) technology for ultra high density NAND flash memory;Jang

5. CMOS-compatible ferroelectric NAND flash memory for high-density, low-power, and high-speed three-dimensional memory

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