Parasitic-Aware Modeling and Neural Network Training Scheme for Energy-Efficient Processing-in-Memory With Resistive Crossbar Array
Author:
Affiliation:
1. School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore
2. A*STAR, Institute of Microelectronics (IME), Singapore
Funder
Agency for Science, Technology and Research (A*STAR), Singapore, under the Nanosystems at the Edge Program
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/5503868/9794907/09766328.pdf?arnumber=9766328
Reference33 articles.
1. Modeling and Analysis of Passive Switching Crossbar Arrays
2. A fully integrated reprogrammable memristor–CMOS system for efficient multiply–accumulate operations
3. Parasitic-Aware Modelling for Neural Networks Implemented with Memristor Crossbar Array
4. Enabling Neuromorphic Computing: BEOL Integration of CMOS RRAM Chip and Programmable Performance
5. Fully hardware-implemented memristor convolutional neural network
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