Author:
Paul Sudipta,Banerjee Pritha,Sur-Kolay Susmita
Cited by
4 articles.
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1. Stitch-avoiding Detailed Routing for Multiple E-Beam Lithography;2022 IFIP/IEEE 30th International Conference on Very Large Scale Integration (VLSI-SoC);2022-10-03
2. Stitch-avoiding Global Routing for Multiple E-Beam Lithography;2022 35th International Conference on VLSI Design and 2022 21st International Conference on Embedded Systems (VLSID);2022-02
3. A study on flare minimisation in EUV lithography by post‐layout re‐allocation of wire segments;IET Circuits, Devices & Systems;2021-03-29
4. Minimization of Flare in EUVL by Simultaneous Wire Segment Perturbation and Dummification;2019 IEEE Computer Society Annual Symposium on VLSI (ISVLSI);2019-07