13.5 A 16nm 128Mb SRAM in high-κ metal-gate FinFET technology with write-assist circuitry for low-V<inf>MIN</inf> applications-Reference-Cited by-同舟云学术

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13.5 A 16nm 128Mb SRAM in high-κ metal-gate FinFET technology with write-assist circuitry for low-VMIN applications

Published:2014-02 Issue: Volume: Page:
ISSN:
Container-title:2014 IEEE International Solid-State Circuits Conference Digest of Technical Papers (ISSCC)
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Author:

Chen Yen-Huei,Chan Wei-Min,Wu Wei-Cheng,Liao Hung-Jen,Pan Kuo-Hua,Liaw Jhon-Jhy,Chung Tang-Hsuan,Li Quincy,Chang George H.,Lin Chih-Yung,Chiang Mu-Chi,Wu Shien-Yang,Natarajan Sreedhar,Chang Jonathan

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/6747109/6757318/06757416.pdf?arnumber=6757416

Cited by 23 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Single Bitline Highly Stable, Low Power With High Speed Half-Select Disturb Free 11T SRAM Cell;ACM Transactions on Design Automation of Electronic Systems;2024-07-09

2. Scaling Trends and Bias Dependence of SRAM SER from 16-nm to 3-nm FinFET;2024 IEEE International Reliability Physics Symposium (IRPS);2024-04-14

3. On the SRAM with comb-shaped nano FETs advancing to 3 nm node and beyond;Microelectronics Journal;2023-08

4. Scaling Trends and the Effect of Process Variations on the Soft Error Rate of advanced FinFET SRAMs;2023 IEEE International Reliability Physics Symposium (IRPS);2023-03

5. Non-Volatile Nano-Electro-Mechanical Switches and Hybrid Circuits in a 16 nm CMOS Back-End-of-Line Process;IEEE Electron Device Letters;2023-01

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