V830R/AV: embedded multimedia superscalar RISC processor

Author:

Suzuki K.,Arai T.,Nadehara K.,Kuroda I.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Cited by 21 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Software-Level Instruction-Cache Leakage Reduction Using Value-Dependence of SRAM Leakage in Nanometer Technologies;Transactions on High-Performance Embedded Architectures and Compilers III;2011

2. Dynamic Context Compression for Low-Power CGRA;Design of Low-Power Coarse-Grained Reconfigurable Architectures;2010-12-09

3. A software technique to improve lifetime of caches containing ultra-leaky SRAM cells caused by within-die Vth variation;Microelectronics Journal;2008-12

4. Zero cost indexing for improved processor cache performance;ACM Transactions on Design Automation of Electronic Systems;2006-01

5. Cache optimization for embedded processor cores;ACM Transactions on Design Automation of Electronic Systems;2004-10

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