On-Chip Total Ionizing Dose Digital Monitor in Fully Depleted SOI Technologies

Author:

Abouzeid FadyORCID,Gasiot GillesORCID,Soussan Dimitri,de Boissac Capucine Lecat-Mathieu,Malherbe Victor,Bertin ValerieORCID,Lallement Guenole,Autran Jean-LucORCID,Roche Philippe

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Nuclear Energy and Engineering,Nuclear and High Energy Physics

Cited by 8 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Extracting Total Ionizing Dose Threshold Voltage Shifts From Ring Oscillator Circuit Response;IEEE Transactions on Device and Materials Reliability;2023-03

2. Design of a battery early warning system based on the single-chip microcomputer;Journal of Physics: Conference Series;2023-01-01

3. A RISC-V System-on-Chip with Embedded Adaptive Power–Performance–Fault-Tolerance Hardware;2022 22nd European Conference on Radiation and Its Effects on Components and Systems (RADECS);2022-10-03

4. Double-node-upset aware SRAM bit-cell for aerospace applications;Microelectronics Reliability;2022-06

5. Mitigating Total-Ionizing-Dose-Induced Threshold-Voltage Shifts Using Back-Gate Biasing in 22-nm FD-SOI Transistors;IEEE Transactions on Nuclear Science;2022-03

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