Stacked 3-D Fin-CMOS technology

Author:

Xusheng Wu ,Chan P.C.H.,Shengdong Zhang ,Chuguang Feng ,Chan M.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Cited by 8 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Stacked Complementary Field-Effect Transistors: Promises and Challenges;2024 8th IEEE Electron Devices Technology & Manufacturing Conference (EDTM);2024-03-03

2. Complementary Field-Effect Transistors: From Silicon to 2D Materials;2023 IEEE 15th International Conference on ASIC (ASICON);2023-10-24

3. References;Three-Dimensional Integrated Circuit Design;2017

4. References;Three-dimensional Integrated Circuit Design;2009

5. Si-nanowire CMOS inverter logic fabricated using gate-all-around (GAA) devices and top-down approach;Solid-State Electronics;2008-09

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