A high-speed CMOS dual-phase dynamic-pseudo NMOS ((DP)/sup 2/) latch and its application in a dual-modulus prescaler-Reference-Cited by-同舟云学术

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A high-speed CMOS dual-phase dynamic-pseudo NMOS ((DP)/sup 2/) latch and its application in a dual-modulus prescaler

Published:1999 Issue:10 Volume:34 Page:1400-1404
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Hongyan Yan ,Biyani M.,O K.K.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx5/4/17209/00792614.pdf?arnumber=792614

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5. Dual-Modulus Prescaler Based on Transmission Gates and Pseudo-PMOS Logic;Analog Integrated Circuits and Signal Processing;2005-04

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