A Non-Volatile Flip-Flop Circuit Using One MTJ and Reference Resistance
Author:
Affiliation:
1. Graduate School of Engineering and Science, Shibaura Institute of Technology,Tokyo,Japan
2. Shibaura Institute of Technology,Department of Computer Science and Engineering,Tokyo,Japan
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx8/10628105/10628121/10628353.pdf?arnumber=10628353
Reference20 articles.
1. Leakage in nanometer CMOS technologies;Narendra;Springer Science & Business Media,2006
2. Trends on the application of emerging nonvolatile memory to processors and programmable devices
3. Nonvolatile Memory Design
4. Nonvolatile flip-flop using pseudo-spin-transistor architecture and its power-gating applications
5. Ultra Low Power Magnetic Flip-Flop Based on Checkpointing/Power Gating and Self-Enable Mechanisms
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