A 100kHz-Bandwidth 98.3dB-SNDR Noise-Shaping SAR ADC with Improved Mismatch Error Shaping and Speed-Up Techniques-Reference-Cited by-同舟云学术

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A 100kHz-Bandwidth 98.3dB-SNDR Noise-Shaping SAR ADC with Improved Mismatch Error Shaping and Speed-Up Techniques

Published:2022-06-12 Issue: Volume: Page:
ISSN:
Container-title:2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)
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Author:

Hasebe Kazunori¹,Etou Shinichirou¹,Miyazaki Daisuke¹,Iguchi Taiki¹,Yagishita Yuki¹,Takasaki Mika¹,Nogamida Takeru¹,Watanabe Hiroyuki¹,Matsumoto Tomohiro¹,Katayama Yasushi¹

Affiliation:

1. Sony Semiconductor Solutions Corporation,Atsugi,Japan

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9830116/9830138/09830166.pdf?arnumber=9830166

Reference4 articles.

Cited by 13 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Partially Feedback NSSAR Embedded Third-Order Delta–Sigma Modulator With Gain-Boosted Two-Stage FIAs;IEEE Journal of Solid-State Circuits;2024-09

2. A 200kHz-bandwidth 101dB SNDR noise-shaping SAR ADC with NTF strengthening method;IEICE Electronics Express;2024-07-10

3. An Improved Foreground Calibration Method for Capacitor Mismatch in NS-SAR ADC;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19

4. A Review on Fundamentals of Noise-Shaping SAR ADCs and Design Considerations;Chips;2024-05-10

5. An 11.36-Bit 405 μW SAR-VCO ADC with single-path differential VCO-based quantizer in 65 nm CMOS;Microelectronics Journal;2024-05

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