A Foreground Mismatch and Memory Harmonic Distortion Calibration Algorithm for TIADC
Author:
Affiliation:
1. School of Electrical and Electronic Engineering, University College Dublin, Dublin 4, Ireland
Funder
China Scholarship Council
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Hardware and Architecture
Link
http://xplorestaging.ieee.org/ielx7/8919/10052778/09991970.pdf?arnumber=9991970
Reference36 articles.
1. A 10-b 120-Msample/s time-interleaved analog-to-digital converter with digital background calibration
2. Fully Digital Feedforward Background Calibration of Clock Skews for Sub-Sampling TIADCs Using the Polyphase Decomposition
3. All-Digital Background Calibration Technique for Time-Interleaved ADC Using Pseudo Aliasing Signal
4. Multi-tone ground truth estimation for ADC testing
5. A High-Precision Time Skew Estimation and Correction Technique for Time-Interleaved ADCs
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