Optimized and Automated Secure IC Design Flow: A Defense-in-Depth Approach-Reference-Cited by-同舟云学术

Optimized and Automated Secure IC Design Flow: A Defense-in-Depth Approach

Published:2024-05 Issue:5 Volume:71 Page:2031-2044
ISSN:1549-8328
Container-title:IEEE Transactions on Circuits and Systems I: Regular Papers
language:
Short-container-title:IEEE Trans. Circuits Syst. I

Author:

Gubbi Kevin Immanuel¹^ORCID,Latibari Banafsheh Saber¹^ORCID,Chowdhury Muhtasim Alam²^ORCID,Jalilzadeh Afrooz³^ORCID,Hamedani Erfan Yazdandoost³^ORCID,Rafatirad Setareh⁴^ORCID,Sasan Avesta¹,Homayoun Houman¹^ORCID,Salehi Soheil²^ORCID

Affiliation:

1. Department of Electrical and Computer Engineering, University of California at Davis, Davis, CA, USA

2. Department of Electrical and Computer Engineering, The University of Arizona, Tucson, AZ, USA

3. Department of Systems and Industrial Engineering, The University of Arizona, Tucson, AZ, USA

4. Department of Computer Science, University of California at Davis, Davis, CA, USA

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Link

http://xplorestaging.ieee.org/ielx7/8919/10510354/10443689.pdf?arnumber=10443689

Reference66 articles.

1. On Improving the Security of Logic Locking

2. Evaluating the security of logic encryption algorithms

3. SFLL-HLS: Stripped-Functionality Logic Locking Meets High-Level Synthesis

4. Functional Analysis Attacks on Logic Locking

5. Stripped Functionality Logic Locking With Hamming Distance-Based Restore Unit (SFLL-hd) – Unlocked

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