Reliable and Efficient Parallel Checkpointing Framework for Nonvolatile Processor With Concurrent Peripherals-Reference-Cited by-同舟云学术

Reliable and Efficient Parallel Checkpointing Framework for Nonvolatile Processor With Concurrent Peripherals

Published:2023-01 Issue:1 Volume:70 Page:228-240
ISSN:1549-8328
Container-title:IEEE Transactions on Circuits and Systems I: Regular Papers
language:
Short-container-title:IEEE Trans. Circuits Syst. I

Author:

Wu Tongda¹^ORCID,Ma Kaisheng²,Hu Jingtong³^ORCID,Xue Jason⁴^ORCID,Li Jinyang¹^ORCID,Shi Xin¹,Yang Huazhong¹^ORCID,Liu Yongpan¹^ORCID

Affiliation:

1. Department of Electronic Engineering, Tsinghua University, Beijing, China

2. Institute for Interdisciplinary Information Sciences (IIIS), Tsinghua University, Beijing, China

3. Department of Electrical and Computer Engineering, University of Pittsburgh, Pittsburgh, PA, USA

4. Department of Computer Science, City University of Hong Kong, Kowloon Tong, Hong Kong

Funder

National Key Research and Development Program

NSFC

Beijing National Research Center for Information Science and Technology

Beijing Innovation Center for Future Chip

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture

Link

http://xplorestaging.ieee.org/ielx7/8919/10025563/09932684.pdf?arnumber=9932684

Reference45 articles.

1. RESTOP: Retaining External Peripheral State in Intermittently-Powered Sensor Systems

2. UNIFORM-1: First micro-satellite of forest fire monitoring constellation project;yamaura;Proc AIAA/USU Conf Small Satell NEXTPAD,2014

3. Nonvolatile Magnetic Flip-Flop for Standby-Power-Free SoCs

4. An 8 MHz 75 ?A/MHz zero-leakage non-volatile logic-based cortex-M0 MCU SoC exhibiting 100% digital state retention at VDD= 0 V with <400 ns wakeup and sleep transitions;bartling;IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers,2013

5. A 65 nm ReRAM-enabled nonvolatile processor with 6X reduction in restore time and 4X higher clock frequency using adaptive data retention and self-write-termination nonvolatile logic;liu;IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers,2016

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