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Generating Posit-Based Accelerators With High-Level Synthesis

  • Published:2023-10 Issue:10 Volume:70 Page:4040-4052
  • ISSN:1549-8328
  • Container-title:IEEE Transactions on Circuits and Systems I: Regular Papers
  • language:
  • Short-container-title:IEEE Trans. Circuits Syst. I

Author:

Murillo Raul1ORCID,Barrio Alberto A. Del2ORCID,Botella Guillermo2ORCID,Pilato Christian3ORCID

Affiliation:

1. Department of Computer Architecture and Automation, Faculty of Physics, Complutense University of Madrid, Madrid, Spain

2. Department of Computer Architecture and Automation, Faculty of Computer Science, Complutense University of Madrid, Madrid, Spain

3. Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano, Milan, Italy

Funder

MCIN/AEI/10

“ERDF—A Way of Making Europe;”

2020 Leonardo Grant for Researchers and Cultural Creators, BBVA Foundation

CM

EU Horizon 2020 Programme

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture

Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Integration of Posit Arithmetic in RISC-V Targeting Low-Power Computations;2024 IEEE 24th International Conference on Nanotechnology (NANO);2024-07-08

2. A System Development Kit for Big Data Applications on FPGA-based Clusters: The EVEREST Approach;2024 Design, Automation & Test in Europe Conference & Exhibition (DATE);2024-03-25
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