FDSOI for cryoCMOS electronics: device characterization towards compact model
Author:
Affiliation:
1. CEA-Leti,Grenoble,France
2. CNRS Institut Néel,Grenoble,France
3. Centro Universitário FEI,Brazil
4. CNRS IMEP-LAHC,Grenoble,France
5. CEA-IRIG,Grenoble,France
6. STMicroelectronics,Crolles,France
Funder
European Research Council
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10019319/10019320/10019322.pdf?arnumber=10019322
Reference18 articles.
Cited by 5 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Modeling Thermal Effects for 28-nm Node Fully Depleted SOI Devices Under Cryogenic Temperatures;IEEE Transactions on Electron Devices;2024-06
2. Experimental Analysis and Modeling of Self-Heating and Thermal Coupling in 28 nm FD-SOI CMOS Transistors Down to Cryogenic Temperatures;IEEE Transactions on Electron Devices;2024-04
3. Thermal Evaluation of 28-nm p-type FD-SOI MOSFETs;2023 IEEE Latin American Electron Devices Conference (LAEDC);2023-07-03
4. Three Temperature Regimes in Subthreshold Characteristics of FD-SOI pMOSFETs From Room-Temperature to Cryogenic Temperatures;IEEE Journal of the Electron Devices Society;2023
5. Enabling full fault tolerant quantum computing with silicon based VLSI technologies;2022 International Electron Devices Meeting (IEDM);2022-12-03
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