Mixed-Type Wafer Defect Recognition With Multi-Scale Information Fusion Transformer
Author:
Affiliation:
1. Glasgow College, University of Electronic Science and Technology of China, Chengdu, China
2. Department of Industrial Engineering, Tsinghua University, Beijing, China
Funder
Innovation Fund of Glasgow College, University of Electronic Science and Technology of China
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Industrial and Manufacturing Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials
Link
http://xplorestaging.ieee.org/ielx7/66/9768876/09728745.pdf?arnumber=9728745
Reference30 articles.
1. A Tutorial on Multilabel Learning
2. Classification of Mixed-Type Defect Patterns in Wafer Bin Maps Using Convolutional Neural Networks
3. A model-based clustering approach to the recognition of the spatial defect patterns produced during semiconductor fabrication
4. Spatial defect pattern recognition on semiconductor wafers using model-based clustering and Bayesian inference
5. Detection and classification of defect patterns on semiconductor wafers
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