Funder
Intel and NSF Joint Research Center on Computer Assisted Programming for Heterogeneous Architectures
Baidu, NEC, and VMWare through the CDSC Industrial Partnership
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software
Cited by
9 articles.
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1. Automated Buffer Sizing of Dataflow Applications in a High-level Synthesis Workflow;ACM Transactions on Reconfigurable Technology and Systems;2024-01-27
2. From Acceleration to Accelerating Acceleration: Modernizing the Accelerator Landscape using High-Level Synthesis;2023 IEEE 31st Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM);2023-05
3. LightningSim: Fast and Accurate Trace-Based Simulation for High-Level Synthesis;2023 IEEE 31st Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM);2023-05
4. Stepwise Debugging for Hardware Accelerators;Proceedings of the 28th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 2;2023-01-27
5. Graph Neural Networks for High-Level Synthesis Design Space Exploration;ACM Transactions on Design Automation of Electronic Systems;2022-12-24