An on-chip metastability measurement circuit to characterize synchronization behavior in 65nm-Reference-Cited by-同舟云学术

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An on-chip metastability measurement circuit to characterize synchronization behavior in 65nm

Published:2011-05 Issue: Volume: Page:
ISSN:
Container-title:2011 IEEE International Symposium of Circuits and Systems (ISCAS)
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Author:

Beer Salomon,Ginosar Ran,Priel Michael,Dobkin Rostislav,Kolodny Avinoam

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/5910713/5937406/05938135.pdf?arnumber=5938135

Cited by 3 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Automated CHIP MTBF Calculator;2022 11th International Conference on Communications, Circuits and Systems (ICCCAS);2022-05-13

2. A Simplified Flop MTBF Extraction Methodology;2022 5th International Conference on Circuits, Systems and Simulation (ICCSS);2022-05-13

3. An Extended Metastability Simulation Method for Synchronizer Characterization;Lecture Notes in Computer Science;2013

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