Ziksa: On-chip learning accelerator with memristor crossbars for multilevel neural networks-Reference-Cited by-同舟云学术

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Ziksa: On-chip learning accelerator with memristor crossbars for multilevel neural networks

Published:2017-05 Issue: Volume: Page:
ISSN:
Container-title:2017 IEEE International Symposium on Circuits and Systems (ISCAS)
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Author:

Zyarah Abdullah M.,Soures Nicholas,Hays Lydia,Jacobs-Gedrim Robin B,Agarwal Sapan,Marinella Matthew,Kudithipudi Dhireesha

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/8014728/8049747/08050531.pdf?arnumber=8050531

Cited by 7 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Securing On-Chip Learning: Navigating Vulnerabilities and Potential Safeguards in Spiking Neural Network Architectures;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19

2. An overview memristor based hardware accelerators for deep neural network;Concurrency and Computation: Practice and Experience;2024-01-04

3. An Overview of the Hierarchical Temporal Memory Accelerators;Artificial Intelligence Applications and Reconfigurable Architectures;2023-02-10

4. A Survey of Intelligent Chip Design Research Based on Spiking Neural Networks;IEEE Access;2022

5. Interface modification of HfO2-based ReRAM via low temperature anneal;Semiconductor Science and Technology;2019-09-16

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