Sense amplifier with offset mismatch calibration for sub 1-V DRAM core operation
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx5/5512009/5536941/05537834.pdf?arnumber=5537834
Cited by 10 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. HiFi-DRAM: Enabling High-fidelity DRAM Research by Uncovering Sense Amplifiers with IC Imaging;2024 ACM/IEEE 51st Annual International Symposium on Computer Architecture (ISCA);2024-06-29
2. An Offset-Canceled Sense Amplifier for DRAMs With Hidden Offset-Cancellation Time and Boosted Internal-Voltage-Difference;IEEE Transactions on Circuits and Systems II: Express Briefs;2023-09
3. An asymmetrically controlled sense amplifier with boosted sensing voltage difference for low-voltage and high-density DRAM;Microelectronic Engineering;2023-05
4. Fast and Efficient Offset Compensation by Noise-Aware Pre-Charge and Operation of DRAM Bit Line Sense Amplifier;IEEE Transactions on Circuits and Systems II: Express Briefs;2023-04
5. Flip Point Offset-Compensation Sense Amplifier with Sensing-Margin-Enhancement for Dynamic Random-Access Memory;IEEE Transactions on Circuits and Systems II: Express Briefs;2023
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