Closed-Form Delay and Crosstalk Models for $RLC$ On-Chip Interconnects Using a Matrix Rational Approximation-Reference-Cited by-同舟云学术

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Closed-Form Delay and Crosstalk Models for $RLC$ On-Chip Interconnects Using a Matrix Rational Approximation

Published:2009-10 Issue:10 Volume:28 Page:1481-1492
ISSN:0278-0070
Container-title:IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
language:
Short-container-title:IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

Author:

Roy S.,Dounavis A.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software

Link

http://xplorestaging.ieee.org/ielx5/43/5247118/05247152.pdf?arnumber=5247152

Cited by 15 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. An Analytic RLC Model for Coupled Interconnects Which Uses a Numerical Inverse Laplace Transform;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-10

2. Modelling and Analysis of Copper and Carbon Nanotube VLSI Interconnects;Interconnect Technologies for Integrated Circuits and Flexible Electronics;2023-09-22

3. Delay and Overshoot Modelling of Asymmetric T-Tree Interconnects;Interconnect Technologies for Integrated Circuits and Flexible Electronics;2023-09-22

4. Accurate Crosstalk Noise Modeling and Analysis of Non-Identical Lossy Interconnections Using Convex Optimization Method;IEEE Transactions on Circuits and Systems I: Regular Papers;2022-10

5. An Efficient Delay Estimation Model for High Speed VLSI Interconnects;WSEAS TRANSACTIONS ON COMMUNICATIONS;2022-01-08

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