DRAM Circuit Design
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Publisher
IEEE
Cited by 36 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. A Benchmark of Cryo-CMOS Embedded SRAM/DRAMs in 40-nm CMOS;IEEE Journal of Solid-State Circuits;2024-07
2. HiFi-DRAM: Enabling High-fidelity DRAM Research by Uncovering Sense Amplifiers with IC Imaging;2024 ACM/IEEE 51st Annual International Symposium on Computer Architecture (ISCA);2024-06-29
3. Read Disturbance in High Bandwidth Memory: A Detailed Experimental Study on HBM2 DRAM Chips;2024 54th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN);2024-06-24
4. Simultaneous Many-Row Activation in Off-the-Shelf DRAM Chips: Experimental Characterization and Analysis;2024 54th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN);2024-06-24
5. FASA-DRAM: Reducing DRAM Latency with Destructive Activation and Delayed Restoration;ACM Transactions on Architecture and Code Optimization;2024-05-21
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