Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Cited by
6 articles.
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1. Ultra Low-Power Implementation of PTL based 1 -Bit Full Adder Using CNTFET Technology;2024 IEEE International Conference on Interdisciplinary Approaches in Technology and Management for Social Innovation (IATMSI);2024-03-14
2. Exploring Low-Power Implementation Techniques for 2:1 MUX Using Conventional and CNTFET Technology: a Performance Comparison;2023 14th International Conference on Computing Communication and Networking Technologies (ICCCNT);2023-07-06
3. Compact channel potential analytical modeling of DG-TFET based on Evanescent-mode approach;Journal of Computational Electronics;2015-07-01
4. Robust subthreshold logic for ultra-low power operation;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2001-02
5. Sub-Domino logic: ultra-low power dynamic sub-threshold digital logic;VLSI Design 2001. Fourteenth International Conference on VLSI Design