Efficient FeFET Crossbar Accelerator for Binary Neural Networks
Author:
Affiliation:
1. Robert Bosch GmbH,Renningen,Germany
2. Fraunhofer IPMS, Center Nanoelectronic Technologies (CNT),Dresden,Germany
3. TU Kaiserslauten,Kaiserslauten,Germany
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9146895/9153218/09153222.pdf?arnumber=9153222
Cited by 6 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Interaxnn: A Reconfigurable and Approximate In-Memory Processing Accelerator for Ultra-Low-Power Binary Neural Network Inference in Intermittently Powered Systems;2024
2. Unlocking Efficiency in BNNs: Global by Local Thresholding for Analog-Based HW Accelerators;IEEE Journal on Emerging and Selected Topics in Circuits and Systems;2023-12
3. FeFET-Based Logic-in-Memory Supporting SA-Free Write-Back and Fully Dynamic Access With Reduced Bitline Charging Activity and Recycled Bitline Charge;IEEE Transactions on Circuits and Systems I: Regular Papers;2023-06
4. Reconfigurable FET Approximate Computing-based Accelerator for Deep Learning Applications;2023 IEEE International Symposium on Circuits and Systems (ISCAS);2023-05-21
5. DAEBI: A Tool for Data Flow and Architecture Explorations of Binary Neural Network Accelerators;Lecture Notes in Computer Science;2023
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