Fabrication of the SiC Gate-All-Around JFET-Reference-Cited by-同舟云学术

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Fabrication of the SiC Gate-All-Around JFET

Published:2023-09 Issue:9 Volume:70 Page:4612-4617
ISSN:0018-9383
Container-title:IEEE Transactions on Electron Devices
language:
Short-container-title:IEEE Trans. Electron Devices

Author:

Mochizuki Masaya¹,Yamamoto Masayuki²^ORCID,Umezawa Hitoshi³^ORCID,Tanaka Yasunori³^ORCID

Affiliation:

1. Advanced Power Electronics Research Center (ADPERC), National Institute of Advanced Industrial Science and Technology (AIST), Tsukuba, Japan

2. Department of Electrical and Electronic Engineering, University of Yamanashi, Kofu, Japan

3. ADPERC, AIST, Tsukuba, Japan

Funder

Ministry of Education, Culture, Sports, Science and Technology (MEXT) Innovative Nuclear Research and Development Program

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx7/16/10227840/10214170.pdf?arnumber=10214170

Reference15 articles.

1. SiC Complementary Junction Field-Effect Transistor Logic Gate Operation at 623 K

2. Inclusion of Body Bias Effect in SPICE Modeling of 4H-SiC Integrated Circuit Resistors

3. Conductivity Anisotropy in Epitaxial 6H and 4H Sic

4. Normally-off 400 °C Operation of n- and p-JFETs With a Side-Gate Structure Fabricated by Ion Implantation Into a High-Purity Semi-Insulating SiC Substrate

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