EasyMAC: Design Exploration-Enabled Multiplier-Accumulator Generator Using a Canonical Architectural Representation: (Invited Paper)
Author:
Affiliation:
1. Center for Energy-efficient Computing and Applications
2. School of CS, Peking University,Beijing,China
Funder
National Natural Science Foundation of China (NSFC)
National Key R&D Program of China
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9712466/9712479/09712519.pdf?arnumber=9712519
Reference17 articles.
1. GOMIL: Global Optimization of Multiplier by Integer Linear Programming
2. Chisel
3. A Suggestion for a Fast Multiplier
4. A 15-ns 32*32-b CMOS multiplier with an improved parallel structure
5. High-speed multiplier design using multi-input counter and compressor circuits
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1. GOMARL: Global Optimization of Multiplier using Multi-Agent Reinforcement Learning;2024 2nd International Symposium of Electronics Design Automation (ISEDA);2024-05-10
2. RL-MUL: Multiplier Design Optimization with Deep Reinforcement Learning;2023 60th ACM/IEEE Design Automation Conference (DAC);2023-07-09
3. A co-design method of customized ISA design space exploration and fixed-point library construction for RISC-V dedicated processor;IEICE Electronics Express;2022-07-10
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