Theory Analyses of SJ-LDMOS With Multiple Floating Buried Layers Based on Bulk Electric Field Modulation
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials
Link
http://xplorestaging.ieee.org/ielx7/16/8359231/08352788.pdf?arnumber=8352788
Cited by 12 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Inverted SOA and Transient Non-Linearity of LDMOS Devices With RESURF-Implant;2022 IEEE International Conference on Emerging Electronics (ICEE);2022-12-11
2. A deep trench super-junction LDMOS with double charge compensation layer;Journal of Semiconductors;2022-10-01
3. Complete Accumulation Lateral Double-Diffused MOSFET With Low ON-Resistance Applying Floating Buried Layer;IEEE Transactions on Electron Devices;2022-02
4. Analytical Study on a 700 V Triple RESURF LDMOS With a Variable High-K Dielectric Trench;IEEE Transactions on Electron Devices;2021-06
5. Research on ESD Protection of Ultra-High Voltage nLDMOS Devices by Super-Junction Engineering in the Drain-Side Drift Region;IEEE Journal of the Electron Devices Society;2021
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