A Substrate Model for On-Chip Tapered Spiral Inductors With Forward and Reverse Excitations
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials
Link
http://xplorestaging.ieee.org/ielx7/16/8585319/08519626.pdf?arnumber=8519626
Cited by 12 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Layout Optimization of Integrated Inductors and Capacitors Using TGV Technology;IEEE Transactions on Components, Packaging and Manufacturing Technology;2024
2. Integrated Inductor Layout Optimization for Synthesis of Microwave LC-Filters in Si/SiGe/GaAs Systems on a Chip;The Herald of the Siberian State University of Telecommunications and Information Science;2023-09-28
3. Simple Methodology to Model On-Chip Inductors for CMOS RF Integrated Circuits Design;2022 IEEE 40th Central America and Panama Convention (CONCAPAN);2022-11-09
4. Electrical Modeling and Characterization of Graphene-Based On-Chip Spiral Inductors;Micromachines;2022-10-26
5. A physical‐based model for on‐chip double‐layer spiral inductors with a ground shield;Microwave and Optical Technology Letters;2022-09-16
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