A Local Optimization Method for Single Flux Quantum Logic Circuits Design Utilizing Synchronizer IPs-Reference-Cited by-同舟云学术

A Local Optimization Method for Single Flux Quantum Logic Circuits Design Utilizing Synchronizer IPs

Published:2023-04 Issue:3 Volume:33 Page:1-8
ISSN:1051-8223
Container-title:IEEE Transactions on Applied Superconductivity
language:
Short-container-title:IEEE Trans. Appl. Supercond.

Author:

Yang Ruoting¹^ORCID,Yang Shucheng¹^ORCID,Ren Jie¹^ORCID,Gao Xiaoping²^ORCID,Yan Wei²,Wang Zhen¹

Affiliation:

1. Shanghai Institute of Microsystem and Information Technology, Center for Excellence in Superconducting Electronics, Chinese Academy of Science, Shanghai, China

2. School of Software and Microelectronics, Peking University, Beijing, China

Funder

National Natural Science Foundation of China

Strategic Priority Research Program of the Chinese Academy of Sciences

Science and Technology Commission of Shanghai Municipality

National Key R&D Program of China

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx7/77/10026197/10036075.pdf?arnumber=10036075

Reference22 articles.

1. Process Control Monitoring for Fabrication Technology of Superconducting Integrated Circuits

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4. Announcing the advanced encryption standard (AES);authors;FIPS PUB,2001

5. Design of multiple fanout clock distribution network for rapid single flux quantum technology

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