Dynamic Configurable Floating-Point FFT Pipelines and Hybrid-Mode CORDIC on FPGA
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx5/4595521/4595522/04595618.pdf?arnumber=4595618
Cited by 11 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Design and Implementation of Floating-Point Transcendental Function Processor Based on RISC- V Architecture;2024 13th International Conference on Communications, Circuits and Systems (ICCCAS);2024-05-10
2. Design of a variable precision CORDIC coprocessor for RISC-V architecture based on FinFET process;IEICE Electronics Express;2023-10-10
3. CORDIC Hardware Acceleration Using DMA-Based ISA Extension;Journal of Low Power Electronics and Applications;2022-01-15
4. A trigonometric hardware acceleration in 32-bit RISC-V microcontroller with custom instruction;IEICE Electronics Express;2021-08-25
5. An FPGA-Based Four-Channel 128k-Point FFT Processor Suitable for Spaceborne SAR;Electronics;2021-03-30
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