Ph.D. Project: Optimizing the Data Traffic for Large Graph Processing on FPGA via a Stateful Approach-Reference-Cited by-同舟云学术

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Ph.D. Project: Optimizing the Data Traffic for Large Graph Processing on FPGA via a Stateful Approach

Published:2024-05-05 Issue: Volume: Page:1-2
ISSN:
Container-title:2024 IEEE 32nd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM)
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Author:

Cheng Qianyu¹,Wang Teng¹,Wang Chao¹

Affiliation:

1. University of Science and Technology of China,Hefei,China,230026

Funder

National Key R&D Program of China

National Natural Science Foundation of China

Jiangsu Provincial Natural Science Foundation

Youth Innovation Promotion Association CAS

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx8/10653616/10653625/10653664.pdf?arnumber=10653664

Reference5 articles.

1. Enhancing Graph Random Walk Acceleration via Efficient Dataflow and Hybrid Memory Architecture

2. GraphReduce

3. Subway

4. ReGraph: Scaling Graph Processing on HBM-enabled FPGAs with Heterogeneous Pipelines

5. Shuhai: Benchmarking High Bandwidth Memory On FPGAS

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