LAMPS: A Layer-wised Mixed-Precision-and-Sparsity Accelerator for NAS-Optimized CNNs on FPGA
Author:
Affiliation:
1. School of Microelectronics, Southern University of Science and Technology,Shenzhen,China
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx8/10653616/10653625/10653662.pdf?arnumber=10653662
Reference18 articles.
1. OMNI: A Framework for Integrating Hardware and Software Optimizations for Sparse CNNs
2. An Efficient Hardware Architecture for Sparse Convolution using Linear Feedback Shift Registers
3. A Mixed-Pruning Based Framework for Embedded Convolutional Neural Network Acceleration
4. An Efficient Hardware Design for Accelerating Sparse CNNs with NAS-based Models
5. An Efficient Hardware Accelerator for Sparse Convolutional Neural Networks on FPGAs
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