Synthesis of LUT Networks for Random-Looking Dense Functions with Don't Cares — Towards Efficient FPGA Implementation of DNN
Author:
Affiliation:
1. University of California,Berkeley,California,USA
2. AMD Research and Advanced Development,Dublin,Ireland
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx8/10653616/10653625/10653677.pdf?arnumber=10653677
Reference18 articles.
1. The decomposition and factorization of Boolean expressions;Brayton,1982
2. Multiple-Valued Minimization for PLA Optimization
3. LUTMIN: FPGA logic synthesis with MUX-based and cascade realizations;Sasao,2009
4. LogicNets: Co-Designed Neural Networks and Circuits for Extreme-Throughput Applications
5. Approximate Logic Synthesis in the Loop for Designing Low-Power Neural Network Accelerator
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