Author:
Rajendran Jeyavijayan,Dhandayuthapany Arunshankar Muruga,Vedula Vivekananda,Karri Ramesh
Cited by
42 articles.
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1. DiSPEL: A Framework for SoC Security Policy Synthesis and Distributed Enforcement;2024 IEEE International Symposium on Hardware Oriented Security and Trust (HOST);2024-05-06
2. Non-Invasive Hardware Trojans Modeling and Insertion: A Formal Verification Approach;Journal of Electronic Testing;2024-02
3. Trojan Localization Using Information Flow Tracking Properties in SoC Designs;2024 37th International Conference on VLSI Design and 2024 23rd International Conference on Embedded Systems (VLSID);2024-01-06
4. AGILE: Automated Assertion Generation to Detect Information Leakage Vulnerabilities;IEEE Transactions on Information Forensics and Security;2024
5. A RISC-V SoC with Hardware Trojans: Case Study on Trojan-ing the On-Chip Protocol Conversion;2023 IFIP/IEEE 31st International Conference on Very Large Scale Integration (VLSI-SoC);2023-10-16