Author:
Veeramachaneni Sreehari,Krishna Kirthi,Avinash Lingamneni,Puppala Sreekanth,Srinivas M.B.
Cited by
59 articles.
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5. FPGA Implementation of Area Efficient 16-Bit Vedic Multiplier Using Higher Order Compressors;2023 IEEE Devices for Integrated Circuit (DevIC);2023-04-07