Experimental behavior of Line-TFET applied to Low-Dropout Voltage Regulator
Author:
Affiliation:
1. University of Sao Paulo,LSI/PSI/USP,Sao Paulo,Brazil
Funder
CNPq
CAPES
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9880925/9880936/09881041.pdf?arnumber=9881041
Reference13 articles.
1. Exploration and evaluation of low-dropout linear voltage regulator with FinFET, TFET and hybrid TFET-FinFET implementations
2. Output conductance at saturation like region on Line-TFET for different dimensions
3. A g/sub m//I/sub D/ based methodology for the design of CMOS analog circuits and its application to the synthesis of a silicon-on-insulator micropower OTA
4. Analog design with Line-TFET device experimental data: from device to circuit level
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