Extreme scaling enabled by 5 tracks cells: Holistic design-device co-optimization for FinFETs and lateral nanowires-Reference-Cited by-同舟云学术

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Extreme scaling enabled by 5 tracks cells: Holistic design-device co-optimization for FinFETs and lateral nanowires

Published:2016-12 Issue: Volume: Page:
ISSN:
Container-title:2016 IEEE International Electron Devices Meeting (IEDM)
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Author:

Bardon M. Garcia,Sherazi Y.,Schuddinck P.,Jang D.,Yakimets D.,Debacker P.,Baert R.,Mertens H.,Badaroglu M.,Mocuta A.,Horiguchi N.,Mocuta D.,Raghavan P.,Ryckaert J.,Spessot A.,Verkest D.,Steegen A.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/7824662/7838021/07838497.pdf?arnumber=7838497

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