Optimised Serial Commutator FFT Architecture in Terms of Multiplexers-Reference-Cited by-同舟云学术

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Optimised Serial Commutator FFT Architecture in Terms of Multiplexers

Published:2023 Issue: Volume: Page:1-1
ISSN:1549-7747
Container-title:IEEE Transactions on Circuits and Systems II: Express Briefs
language:
Short-container-title:IEEE Trans. Circuits Syst. II

Author:

Fang Hongji¹^ORCID,Ma Zhenguo¹^ORCID,Yu Feng¹^ORCID,Zhao Bei²^ORCID,Zhang Bo³^ORCID

Affiliation:

1. College of Biomedical Engineering and Instrument Science, Zhejiang University, Hangzhou, China

2. College of Computer Science and Technology, Hangzhou Dianzi University, Hangzhou, China

3. College of Information Science and Electronic Engineering, Zhejiang University, Hangzhou, China

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/8920/4358609/10215374.pdf?arnumber=10215374

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Network-Architecture-Aware Multiplexer Decomposition for Technology Mapping;IEEE Transactions on Circuits and Systems II: Express Briefs;2024-09

2. Optimized 4-Parallel 1024-Point MSC FFT;IEEE Access;2024

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