BAG2 Assisted Hierarchical Analog Layout Synthesis for Planar Technologies-Reference-Cited by-同舟云学术

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BAG2 Assisted Hierarchical Analog Layout Synthesis for Planar Technologies

Published:2023-09-20 Issue: Volume: Page:
ISSN:
Container-title:2023 Austrochip Workshop on Microelectronics (Austrochip)
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Author:

Bio Matthew¹,Scherr Wolfgang¹,Agbemenu A. S.²,Sondón Santiago Martin¹,Sturm Johannes³,Hande Vinayak¹

Affiliation:

1. Carinthia Institute for Microelectronics, Carinthia University of Applied Sciences,Josef Ressel Centre for System-on-Chip Design Automation

2. Kwame Nkrumah University of Science and Technology,Department of Computer Engineering,Kumasi,Ghana

3. Carinthia University of Applied Sciences,Department of Integrated Systems and Circuit Design,Villach,Austria

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10285149/10285150/10285163.pdf?arnumber=10285163

Reference9 articles.

1. An Integrated Layout-Synthesis Approach for Analog ICs

2. The ALIGN Open-Source Analog Layout Generator: v1.0 and Beyond (Invited talk);dhar;IEEE/ACM International Conference on Computer Aided Design (ICCAD),2020

3. A Gm/Id Based Methodology for Designing Common Source Amplifier

4. LAYGO - LAYout with Gridded Objects;laygo;Github,2023

5. Performance Comparison of BAG and Custom Generated Analog Layout for Single-Tail Dynamic Comparator

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. BAG2-assisted analog layout synthesis for TSMC 65 nm and GPDK 45 nm;e+i Elektrotechnik und Informationstechnik;2024-01-31

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