Scale up your In-Memory Accelerator: Leveraging Wireless-on-Chip Communication for AIMC-based CNN Inference-Reference-Cited by-同舟云学术

Scale up your In-Memory Accelerator: Leveraging Wireless-on-Chip Communication for AIMC-based CNN Inference

Published:2022-06-13 Issue: Volume: Page:
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Container-title:2022 IEEE 4th International Conference on Artificial Intelligence Circuits and Systems (AICAS)
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Author:

Bruschi Nazareno¹,Tagliavini Giuseppe¹,Conti Francesco¹,Abadal Sergi²,Cabellos-Aparicio Alberto²,Alarcon Eduard²,Karunaratne Geethan³,Boybat Irem³,Benini Luca¹,Rossi Davide¹

Affiliation:

1. University of Bologna,Bologna,Italy

2. Universitat Politècnica de Catalunya,Barcelona,Spain

3. IBM Research Europe

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9869844/9869845/09869996.pdf?arnumber=9869996

Reference18 articles.

1. Dataflow-architecture co-design for 2.5-D DNN accelerators using wireless network-on-package;guirado;2021 26th Asia and South Pacific Design Automation Conference (ASP-DAC),2021

2. On-Chip Communication Network for Efficient Training of Deep Convolutional Networks on Heterogeneous Manycore Systems

3. PipeDream

4. Channel Modeling and Characterization for Wireless Networks-on-Chip Communications in the Millimeter Wave and Terahertz Bands

Cited by 3 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Which Coupled is Best Coupled? An Exploration of AIMC Tile Interfaces and Load Balancing for CNNs;IEEE Transactions on Parallel and Distributed Systems;2024-10

2. PATRONoC: Parallel AXI Transport Reducing Overhead for Networks-on-Chip targeting Multi-Accelerator DNN Platforms at the Edge;2023 60th ACM/IEEE Design Automation Conference (DAC);2023-07-09

3. Networks-on-Chip to Enable Large-Scale Multi-core ML Acceleration;Towards Heterogeneous Multi-core Systems-on-Chip for Edge Machine Learning;2023-07-03