Deductive Fault Simulation for Asynchronous Sequential Circuits

Author:

Dobai Roland,Gramatova Elena

Publisher

IEEE

Cited by 7 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Vector-deductive Memory-based Transactions for Fault-as-address Simulation;Èlektronnoe modelirovanie;2023-03-16

2. Vector-Deductive Memory-Based Transactions for Fault-As-Address Simulation;2022 12th International Conference on Dependable Systems, Services and Technologies (DESSERT);2022-12-09

3. Vector Models for Modeling Logic Based on XOR-Relations;2022 IEEE 16th International Conference on Advanced Trends in Radioelectronics, Telecommunications and Computer Engineering (TCSET);2022-02-22

4. Vector models for analysis of logical functions of society management;Computer Design Systems. Theory and Practice;2022

5. VECTOR-DRIVEN LOGIC AND STRUCTURE FOR TESTING AND DEDUCTIVE FAULT SIMULATION;Radio Electronics, Computer Science, Control;2021-10-06

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