Time-Dependent Degradation Mechanism of 1.2 kV SiC MOSFET Under Long-Term High-Temperature Gate Bias Stress-Reference-Cited by-同舟云学术

Time-Dependent Degradation Mechanism of 1.2 kV SiC MOSFET Under Long-Term High-Temperature Gate Bias Stress

Published:2023-03 Issue:3 Volume:70 Page:1162-1167
ISSN:0018-9383
Container-title:IEEE Transactions on Electron Devices
language:
Short-container-title:IEEE Trans. Electron Devices

Author:

Shen Yutong¹^ORCID,He Zhiyuan²^ORCID,Shi Yijun²^ORCID,Niu Hao²^ORCID,Chen Yuan²^ORCID,Liu Chang²^ORCID,Chen Yiqiang²^ORCID,Cai Zongqi²^ORCID,Lu Guoguang²,Dai Xianying¹

Affiliation:

1. School of Microelectronics, Xidian University, Xi’an, China

2. China Electronic Product Reliability and Environmental Testing Research Institute, Guangzhou, China

Funder

National Natural Science Foundation of China

National Key Research and Development Program of China

Key-Area Research and Development Program of Guangdong Province

Ministry of Industry and Information Technology of the People’s Republic of China

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx7/16/10053598/09927322.pdf?arnumber=9927322

Reference33 articles.

1. Basic Mechanisms of Threshold-Voltage Instability and Implications for Reliability Testing of SiC MOSFETs

2. Online Monitoring for Threshold Voltage of SiC MOSFET Considering the Coupling Impact on BTI and Junction Temperature

3. Localization of off-stress-induced damage in AlGaN/GaN high electron mobility transistors by means of low frequency 1/f noise measurements

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