A 100 MS/s 4 MHz Bandwidth 70 dB SNR $\Delta \Sigma$ ADC in 90 nm CMOS-Reference-Cited by-同舟云学术

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A 100 MS/s 4 MHz Bandwidth 70 dB SNR $\Delta \Sigma$ ADC in 90 nm CMOS

Published:2009-06 Issue:6 Volume:44 Page:1697-1708
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Fujimoto Yoshihisa,Kanazawa Yusuke,Lo Re Pascal,Iizuka Kunihiko

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx5/4/4982858/04982885.pdf?arnumber=4982885

Cited by 18 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Reconfigurable 0.1–10 MHz DT Passive Dynamic Zoom ADC for Cellular Receivers;IEEE Transactions on Circuits and Systems I: Regular Papers;2020-07

2. A 5-MHz bandwidth 78.1-dB SNDR 2-2 MASH delta-sigma modulator;International Journal of Electronics;2019-10-01

3. Frontiers, Trends and Challenges: Towards Next-generation ΣΔ Modulators;Sigma-Delta Converters;2018-09-03

4. A 1-V 5-MHz Bandwidth 68.3-dB SNDR Continuous-Time Delta-Sigma Modulator With a Feedback-Assisted Quantizer;IEEE Transactions on Circuits and Systems I: Regular Papers;2017-05

5. A 92-dB DR, 24.3-mW, 1.25-MHz BW Sigma–Delta Modulator Using Dynamically Biased Op Amp Sharing;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2017-03

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