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Discrete-Time Framework for Analysis and Design of Digitally Current-Mode-Controlled Intermediate Bus Architectures for Fast Transient and Stability

  • Published:2020-12 Issue:4 Volume:8 Page:3237-3249
  • ISSN:2168-6777
  • Container-title:IEEE Journal of Emerging and Selected Topics in Power Electronics
  • language:
  • Short-container-title:IEEE J. Emerg. Sel. Topics Power Electron.

Author:

Roy RabisankarORCID,Kapat SantanuORCID

Funder

Ministry of Human Resource Development

Ministry of Electronics and Information Technology (MeitY), Government of India, under the IMPRINT programme

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Energy Engineering and Power Technology

Cited by 11 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Modeling, Analysis, and Design of 48/12V Digitally Controlled Non-Isolated DAB-Type Converters for Automotive and Data Center Applications;2023 IEEE International Conference on Power Electronics, Smart Grid, and Renewable Energy (PESGRE);2023-12-17

2. Grid-Forming Converter and Stability Aspects of Renewable-Based Low-Inertia Power Networks: Modern Trends and Challenges;Arabian Journal for Science and Engineering;2023-11-09

3. Stability Effect of Load Converter on Source Converter in a Cascaded Buck Converter;IEEE Transactions on Power Electronics;2023-01

4. A Discrete-Time Framework for Designing Stable Digital V$^{2}$ Controllers for the Buck Converter;IEEE Transactions on Power Electronics;2022-12

5. Clock Shift and Sampling Delay Effects on Stability in Digitally Controlled Cascaded DC-DC Converters;IECON 2022 – 48th Annual Conference of the IEEE Industrial Electronics Society;2022-10-17
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