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Regression Prefetcher with Preprocessing for DRAM-PCM Hybrid Main Memory

  • Published:2018-07-01 Issue:2 Volume:17 Page:163-166
  • ISSN:1556-6056
  • Container-title:IEEE Computer Architecture Letters
  • language:
  • Short-container-title:IEEE Comput. Arch. Lett.

Author:

Yun Ji-TaeORCID,Yoon Su-KyungORCID,Kim Jeong-GeunORCID,Burgstaller BerndORCID,Kim Shin-DugORCID

Funder

Next Generation Information Computing Development Program

National Research Foundation of Korea (NRF)

Ministry of Science, ICT & Future Planning

Industry-Academy joint research program

Samsung Electronics and Yonsei University

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Hardware and Architecture

Cited by 8 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Novel Hybrid Memory System based on Non-Volatile Memory for Edge Intelligent IoT Devices;2024 2nd International Conference on Intelligent Data Communication Technologies and Internet of Things (IDCIoT);2024-01-04

2. Adaptive Regression Prefetching Algorithm by Using Big Data Application Characteristics;Applied Sciences;2023-03-31

3. Low power and high I/O efficiency hybrid memory for Internet of Things edge devices;Microelectronics Journal;2022-09

4. Dynamic recognition prefetch engine for DRAM-PCM hybrid main memory;The Journal of Supercomputing;2021-06-21

5. Enabling Write-Reduction Multiversion Scheme With Efficient Dual-Range Query Over NVRAM;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2021-06
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