An Ultra-Low-Voltage 2.4-GHz Flicker-Noise-Free RF Receiver Front End Based on Switched-Capacitor Hybrid TIA With 4.5-dB NF and 11.5-dBm OIP3

Author:

Chen Chao1ORCID,Huang Dan2,Zhao Yan1,Jin Yuemin3,Yang Jun1

Affiliation:

1. National ASIC Centre, Southeast University, Nanjing, China

2. Microwave Device Department, Nanjing Electronic Devices Institute, Nanjing, China

3. NXP Semiconductors, Suzhou, China

Funder

National Key Research and Development Program of China

Electronic Devices Institute Research Fund

National Application and System Integrated Circuit Research Centre, Southeast University

Nanjing Electronic Devices Institute, Nanjing, China

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Reference31 articles.

1. 26.1 A 5.5 mW ADPLL-based receiver with hybridloop interference rejection for BLE application in 65 nm CMOS;okuni;IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers,2016

2. A 0.8 V 0.8 mm2 Bluetooth 5/BLE digital-intensive transceiver with a 2.3 mW phase-tracking RX utilizing a hybrid loop filter for interference resilience in 40 nm CMOS;ding;IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers,2018

3. A Resistively Degenerated Wideband Passive Mixer With Low Noise Figure and High ${\rm IIP}_{2}$

4. An ADPLL-centric Bluetooth low-energy transceiver with 2.3 mW interference-tolerant hybrid-loop receiver and 2.9 mW single-point polar transmitter in 65 nm CMOS;liu;IEEE Int Solid-State Circuits Conf (ISSCC) Dig Tech Papers,2018

5. Low-Power High-Linearity Mixer-First Receiver Using Implicit Capacitive Stacking With 3× Voltage Gain

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